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Our paper at the IEEE/ECS 18TH EUROPEAN CONFERENCE on CIRCUIT THEORY
and DESIGN:

UNIVERSITY of SEVILLE, SPAIN, August 26-30, 2007

“ANALOG CIRCUITS for THERMISTOR LINEARIZATION with CHEBYSHEV-OPTIMAL
LINEARITY ERROR" - paper #5341

Summary—This paper investigates analog linearization circuits for NTC thermistors,
and the theoretical limits to linearity performance. In theory, by using multiple
thermistors, the circuit may have a linearity error that is arbitrarily small and
optimal in the uniform (Chebyshev) norm. This result is new, and applies to a
variety of other impedance-type sensors (e.g. resistive, capacitive)*. The theory
has important implications for design; we propose and discuss some design rules.
Experimental data from a three-thermistor circuit shows approximately ±16 mK
(160 ppm) linearity over a span of 100 °C, consistent with a theoretical limit of
±12 mK (120 ppm).

* patent pending

 

 

 


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